基于FPGA的可配置浮点向量范数 求解IP核

SEMI OpenIR > 高速电路与神经网络实验室

	基于FPGA的可配置浮点向量范数求解IP核
	乔瑞秀; 鲁华祥; 陈刚
Rights Holder	中国科学院
Date Available	2016-01-27
Country	中国
Subtype	发明
Subject Area	数字集成电路设计
Application Date	2015-11-26
Patent Number	105278914A
Language	中文
Application Number	CN201510835635.8
Document Type	专利
Identifier	http://ir.semi.ac.cn/handle/172111/27652
Collection	高速电路与神经网络实验室
Recommended Citation GB/T 7714	乔瑞秀,鲁华祥,陈刚. 基于FPGA的可配置浮点向量范数求解IP核. 105278914A.

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