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题名: A Complex BPF with On Chip Auto-tuning Architecture for Low-IF Receivers
作者: Chen FX;  Lin M;  Jia HL;  Shi Y
出版日期: 2008
会议日期: OCT 20-23, 2008
摘要: A 3(rd) order complex band-pass filter (BPF) with auto-tuning architecture is proposed in this paper. It is implemented in 0.18 mu m standard CMOS technology. The complex filter is centered at 4.092MHz with bandwidth of 2.4MHz. The in-band 3(rd) order harmonic input intercept point (IIP3) is larger than 19dBm, with 50 Omega as the source impedance. The input referred noise is about 80 mu V-rms. The RC tuning is based on Binary Search Algorithm (BSA) with tuning accuracy of 3%. The chip area of the tuning system is 0.28x0.22mm(2), less than 1/8 of that of the main-filter which is 0.92x0.59mm(2). After tuning is completed, the tuning system will be turned off automatically to save power and to avoid interference. The complex filter consumes 2.6mA with a 1.8V power supply.
会议名称: 9th International Conference on Solid-State and Integrated-Circuit Technology
会议文集: 2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY
专题: 中国科学院半导体研究所(2009年前)_会议论文

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推荐引用方式:
Chen,FX;Lin,M;Jia,HL;Shi,Y.A Complex BPF with On Chip Auto-tuning Architecture for Low-IF Receivers .见:IEEE .2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY,345 E 47TH ST, NEW YORK, NY 10017 USA ,2008,VOLS 1-4: 1657-1660
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