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题名: An ultra-low power CMOS random number generator
作者: Zhou, SH;  Zhang, W;  Wu, NJ
发表日期: 2008
摘要: This paper proposes an ultra-low power CMOS random number generator (RING), which is based on an oscillator-sampling architecture. The noisy oscillator consists of a dual-drain MOS transistor, a noise generator and a voltage control oscillator. The dual-drain MOS transistor can bring extra-noise to the drain current or the output voltage so that the jitter of the oscillator is much larger than the normal oscillator. The frequency division ratio of the high-frequency sampling oscillator and the noisy oscillator is small. The RNG has been fabricated in a 0.35 mu m CMOS process. It can produce good quality bit streams without any post-processing. The bit rate of this RNG could be as high as 100 kbps. It has a typical ultra-low power dissipation of 0.91 mu W. This novel circuit is a promising unit for low power system and communication applications. (c) 2007 Elsevier Ltd. All rights reserved.
KOS主题词: Noise;  Noise pollution;  Sounds;  oscillator
刊名: SOLID-STATE ELECTRONICS
专题: 中国科学院半导体研究所(2009年前)_期刊论文

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推荐引用方式:
Zhou, SH ; Zhang, W ; Wu, NJ .An ultra-low power CMOS random number generator ,SOLID-STATE ELECTRONICS,2008 ,52(2): 233-238
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