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An ultra-low-power area-efficient non-volatile memory in a 0.18 μm single-poly CMOS process for passive RFID tags
Jia Xiaoyun,Feng Peng,Zhang Shengguang,Wu Nanjian,Zhao Baiqin and Liu Su
2013
Source PublicationJournal of Semiconductors
Volume34Issue:8Pages:085004
Subject Area半导体物理
Indexed ByEI
Language英语
Date Available2014-05-08
Document Type期刊论文
Identifierhttp://ir.semi.ac.cn/handle/172111/24921
Collection半导体超晶格国家重点实验室
Recommended Citation
GB/T 7714
Jia Xiaoyun,Feng Peng,Zhang Shengguang,Wu Nanjian,Zhao Baiqin and Liu Su. An ultra-low-power area-efficient non-volatile memory in a 0.18 μm single-poly CMOS process for passive RFID tags[J]. Journal of Semiconductors,2013,34(8):085004.
APA Jia Xiaoyun,Feng Peng,Zhang Shengguang,Wu Nanjian,Zhao Baiqin and Liu Su.(2013).An ultra-low-power area-efficient non-volatile memory in a 0.18 μm single-poly CMOS process for passive RFID tags.Journal of Semiconductors,34(8),085004.
MLA Jia Xiaoyun,Feng Peng,Zhang Shengguang,Wu Nanjian,Zhao Baiqin and Liu Su."An ultra-low-power area-efficient non-volatile memory in a 0.18 μm single-poly CMOS process for passive RFID tags".Journal of Semiconductors 34.8(2013):085004.
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