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IC测试系统精密定时器的新结构
王东辉; 施映; 林雨
2002
Source Publication半导体学报
Volume23Issue:11Pages:1224-1227
Abstract讨论了一种适合于VLSI的精密定时子系统的新结构。该结构将定时计数器分为高速和低速两部分,低速部分采用存储器代替分散的寄存器,既有利于集成,又降低了系统的成本。同时,新的精密定时子系统还解决了定时中不完整周期的问题。
metadata_83中国科学院半导体研究所
Subject Area微电子学
Indexed ByCSCD
Language中文
CSCD IDCSCD:1007625
Date Available2010-11-23
Citation statistics
Document Type期刊论文
Identifierhttp://ir.semi.ac.cn/handle/172111/17987
Collection中国科学院半导体研究所(2009年前)
Recommended Citation
GB/T 7714
王东辉,施映,林雨. IC测试系统精密定时器的新结构[J]. 半导体学报,2002,23(11):1224-1227.
APA 王东辉,施映,&林雨.(2002).IC测试系统精密定时器的新结构.半导体学报,23(11),1224-1227.
MLA 王东辉,et al."IC测试系统精密定时器的新结构".半导体学报 23.11(2002):1224-1227.
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