SEMI OpenIR  > 中国科学院半导体研究所(2009年前)
Simulation of a Monolithic Integrated CMOS Preamplifier for Neural Recordings
Sui Xiaohong; Liu Jinbin; Gu Ming; Pei Weihua; Chen Hongda
2005
Source Publication半导体学报
Volume26Issue:12Pages:2275-2280
AbstractA monolithic integrated CMOS preamplifier is presented for neural recording applications. Two AC-coupied capacitors are used to eliminate the large and random DC offsets existing in the electrode-electrolyte interface. Diode-connected nMOS transistors with a negative voltage between the gate and source are candidates for the large resistors necessary for the preamplifier. A novel analysis is given to determine the noise power spectral density. Simulation results show that the two-stage CMOS preamplifier in a closed-loop capacitive feedback configuration provides an AC in-band gain of 38.8dB,a DC gain of 0,and an input-referred noise of 277nVmax, integrated from 0. 1Hz to 1kHz. The preamplifier can eliminate the DC offset voltage and has low input-referred noise by novel circuit configuration and theoretical analysis.
metadata_83institute of semiconductors, chinese academy of sciences
Subject Area光电子学
Funding Organization国家高技术研究发展计划,国家自然科学基金资助项目
Indexed ByCSCD
Language英语
CSCD IDCSCD:2198522
Date Available2010-11-23
Citation statistics
Document Type期刊论文
Identifierhttp://ir.semi.ac.cn/handle/172111/16815
Collection中国科学院半导体研究所(2009年前)
Recommended Citation
GB/T 7714
Sui Xiaohong,Liu Jinbin,Gu Ming,et al. Simulation of a Monolithic Integrated CMOS Preamplifier for Neural Recordings[J]. 半导体学报,2005,26(12):2275-2280.
APA Sui Xiaohong,Liu Jinbin,Gu Ming,Pei Weihua,&Chen Hongda.(2005).Simulation of a Monolithic Integrated CMOS Preamplifier for Neural Recordings.半导体学报,26(12),2275-2280.
MLA Sui Xiaohong,et al."Simulation of a Monolithic Integrated CMOS Preamplifier for Neural Recordings".半导体学报 26.12(2005):2275-2280.
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