SEMI OpenIR  > 中国科学院半导体研究所(2009年前)
A High Speed, 12-Channel Parallel, Monolithic Integrated CMOS OEIC Receiver
Zhu Haobo; Mao Luhong; Yu Changliang; Chen Hongda; Tang Jun
2007
Source Publication半导体学报
Volume28Issue:9Pages:1341-1345
AbstractThe design and fabrication of a high speed, 12-channel monolithic integrated CMOS optoelectronic integrated circuit(OEIC) receiver are reported.Each channel of the receiver consists of a photodetector,a transimpedance amplifier,and a post-amplifier.The double photodiode structure speeds up the receiver but hinders responsivity.The adoption of active inductors in the TIA circuit extends the-3dB bandwidth to a higher level.The receiver has been realized in a CSMC 0.6μm standard CMOS process.The measured results show that a single channel of the receiver is able to work at bit rates of 0.8~1.4Gb/s. Altogether, the 12-channel OEIC receiver chip can be operated at 15Gb/s.
metadata_83school of electronic information engineering, tianjin university;institute of semiconductors, chinese academy of sciences
Subject Area光电子学
Funding Organization国家自然科学基金(批准号:6 536 3 ,6 676 38),天津市基础研究重点项目(批准号: 6YFJZJC 2 )资助项目
Indexed ByCSCD
Language英语
CSCD IDCSCD:2919964
Date Available2010-11-23
Citation statistics
Document Type期刊论文
Identifierhttp://ir.semi.ac.cn/handle/172111/16225
Collection中国科学院半导体研究所(2009年前)
Recommended Citation
GB/T 7714
Zhu Haobo,Mao Luhong,Yu Changliang,et al. A High Speed, 12-Channel Parallel, Monolithic Integrated CMOS OEIC Receiver[J]. 半导体学报,2007,28(9):1341-1345.
APA Zhu Haobo,Mao Luhong,Yu Changliang,Chen Hongda,&Tang Jun.(2007).A High Speed, 12-Channel Parallel, Monolithic Integrated CMOS OEIC Receiver.半导体学报,28(9),1341-1345.
MLA Zhu Haobo,et al."A High Speed, 12-Channel Parallel, Monolithic Integrated CMOS OEIC Receiver".半导体学报 28.9(2007):1341-1345.
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